Part No.

VDD System
Clock
Program
Memory
Data
Memory
I/O LCD Timer Interrupt Dual
Slope
ADC
Charge
Pump, Regulator
UART Stack Package
8-bit 16-bit 18-bit RTC  Ext. Int.
2.2V~
5.5V
4MHz 2Kx14 32x8 10 10x3 1 1 - - 1 3 1ch v - 4 48SSOP
2.2V~
5.5V
400kHz~
8MHz
2Kx15 96x8 12 16x4 or 17x3 1 1 - - 1 3 1ch v - 4 52QFP
4Kx15
2.2V~
5.5V
400kHz~
8MHz
4Kx15 96x8 10 15x4 or 16x3 1 - 1 v 2 4 1ch v - 6 56SSOP
2.2V~
5.5V
400kHz~
8MHz
8Kx16 160x8 18 40x4 or 41x3 - 1 1 v 1 5 4ch v v 16 100QFP
Note: These devices are only available in OTP versions.
 
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